F-timer: Dedicated FPGA to real-time systems design support

A. Parisoto; A. Souza; L. Carro; M. Pontremoli; C. Pereira; A. Suzim

doi:10.1109/EMWRTS.1997.613761

F-timer: Dedicated FPGA to real-time systems design support

A. Parisoto, A. Souza, L. Carro, M. Pontremoli, C. Pereira, A. Suzim

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

5 Scopus citations

Abstract

This paper presents a hardware architecture and its FPGA implementation for real-time operating systems support. Dedicated hardware units are responsible for the maintenance of a 32 tasks list organized by time priority. The co-processor also communicates with the microprocessor to program interrupt modes and tasks. This dedicated HW architecture was easily prototyped in modern FPGAs, being a cost-effective solution to free microcontrollers from the burden of task time management. The FPGA has been completely synthesized based on a HDL description, allowing its use as a macrocell in larger designs. The task resolution is of 100μs.

Original language	English (US)
Title of host publication	Proceedings - 9th Euromicro Workshop on Real Time Systems, ECRTS 1997
Pages	35-40
Number of pages	6
DOIs	https://doi.org/10.1109/EMWRTS.1997.613761
State	Published - 1997
Externally published	Yes
Event	9th Euromicro Workshop on Real Time Systems, ECRTS 1997 - Toledo, Spain Duration: Jun 11 1997 → Jun 13 1997

Publication series

Name	Proceedings - Euromicro Conference on Real-Time Systems
ISSN (Print)	1068-3070

Conference

Conference	9th Euromicro Workshop on Real Time Systems, ECRTS 1997
Country/Territory	Spain
City	Toledo
Period	6/11/97 → 6/13/97

ASJC Scopus subject areas

Software
Hardware and Architecture

Access to Document

10.1109/EMWRTS.1997.613761

Cite this

Parisoto, A, Souza, A, Carro, L, Pontremoli, M, Pereira, C & Suzim, A 1997, F-timer: Dedicated FPGA to real-time systems design support. in Proceedings - 9th Euromicro Workshop on Real Time Systems, ECRTS 1997., 613761, Proceedings - Euromicro Conference on Real-Time Systems, pp. 35-40, 9th Euromicro Workshop on Real Time Systems, ECRTS 1997, Toledo, Spain, 6/11/97. https://doi.org/10.1109/EMWRTS.1997.613761

@inproceedings{7001c437daf44d5f8d276c202c064e88,

title = "F-timer: Dedicated FPGA to real-time systems design support",

abstract = "This paper presents a hardware architecture and its FPGA implementation for real-time operating systems support. Dedicated hardware units are responsible for the maintenance of a 32 tasks list organized by time priority. The co-processor also communicates with the microprocessor to program interrupt modes and tasks. This dedicated HW architecture was easily prototyped in modern FPGAs, being a cost-effective solution to free microcontrollers from the burden of task time management. The FPGA has been completely synthesized based on a HDL description, allowing its use as a macrocell in larger designs. The task resolution is of 100μs.",

author = "A. Parisoto and A. Souza and L. Carro and M. Pontremoli and C. Pereira and A. Suzim",

year = "1997",

doi = "10.1109/EMWRTS.1997.613761",

language = "English (US)",

isbn = "0818680342",

series = "Proceedings - Euromicro Conference on Real-Time Systems",

pages = "35--40",

booktitle = "Proceedings - 9th Euromicro Workshop on Real Time Systems, ECRTS 1997",

note = "9th Euromicro Workshop on Real Time Systems, ECRTS 1997 ; Conference date: 11-06-1997 Through 13-06-1997",

}

TY - GEN

T1 - F-timer

T2 - 9th Euromicro Workshop on Real Time Systems, ECRTS 1997

AU - Parisoto, A.

AU - Souza, A.

AU - Carro, L.

AU - Pontremoli, M.

AU - Pereira, C.

AU - Suzim, A.

PY - 1997

Y1 - 1997

N2 - This paper presents a hardware architecture and its FPGA implementation for real-time operating systems support. Dedicated hardware units are responsible for the maintenance of a 32 tasks list organized by time priority. The co-processor also communicates with the microprocessor to program interrupt modes and tasks. This dedicated HW architecture was easily prototyped in modern FPGAs, being a cost-effective solution to free microcontrollers from the burden of task time management. The FPGA has been completely synthesized based on a HDL description, allowing its use as a macrocell in larger designs. The task resolution is of 100μs.

AB - This paper presents a hardware architecture and its FPGA implementation for real-time operating systems support. Dedicated hardware units are responsible for the maintenance of a 32 tasks list organized by time priority. The co-processor also communicates with the microprocessor to program interrupt modes and tasks. This dedicated HW architecture was easily prototyped in modern FPGAs, being a cost-effective solution to free microcontrollers from the burden of task time management. The FPGA has been completely synthesized based on a HDL description, allowing its use as a macrocell in larger designs. The task resolution is of 100μs.

UR - http://www.scopus.com/inward/record.url?scp=84884644594&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84884644594&partnerID=8YFLogxK

U2 - 10.1109/EMWRTS.1997.613761

DO - 10.1109/EMWRTS.1997.613761

M3 - Conference contribution

AN - SCOPUS:84884644594

SN - 0818680342

SN - 9780818680342

T3 - Proceedings - Euromicro Conference on Real-Time Systems

SP - 35

EP - 40

BT - Proceedings - 9th Euromicro Workshop on Real Time Systems, ECRTS 1997

Y2 - 11 June 1997 through 13 June 1997

ER -

F-timer: Dedicated FPGA to real-time systems design support

Abstract

Publication series

Conference

ASJC Scopus subject areas

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