TY - GEN
T1 - Real time digital implementation of the High-Yield-Pileup-Event-Recover (HYPER) method
AU - Liu, Jiguo
AU - Li, Hongdi
AU - Wang, Yu
AU - Kim, Soonseok
AU - Zhang, Yuxuan
AU - Liu, Shitao
AU - Baghaei, Hossain
AU - Ramirez, Rocio
AU - Wong, Wai Hoi
PY - 2007
Y1 - 2007
N2 - We have proposed a high-yield-pileup-event-recover (HYPER) method that can process scintillation signals in very high count-rate situations where multiple-event pileups are normal, and successfully used this method in our BGO animal PET and human PET systems. In the first generation HYPER electronics, the integration and weight-sum circuits were implemented using analog signal. However, the same idea can be implemented in full digital mode. In the digital HYPER method, the input signal is digitized with a free run ADC, and then processed in a Field Programmable Gate Array (FPGA). Recent improvement in integrated circuit technology makes it possible to do digitization and real-time processing with clock frequency over 200MHz. The dead time is reduced because there's no dead-time for discharging the integration value. The analog delay line used to balance the trigger delay is removed, which will reduce the signal distortion, and in turn increase the measurement resolution. The processing in the FPGA includes digital integration, weight-sum, and dynamic pile-up correction. Simulation shows a possible working frequency of 320MHz with a low-cost FPGA, the Altera CY2C35F484C6. Energy spectrum of LSO with count rate up to 20MCPS has been studied. The energy resolution of 1, 2, 4, 8, 12, 16 and 20MCPS is 10.6%, 11.1%, 12.4%, 14.1%, 16.2%, 18.4% and 23.0%, respectively.
AB - We have proposed a high-yield-pileup-event-recover (HYPER) method that can process scintillation signals in very high count-rate situations where multiple-event pileups are normal, and successfully used this method in our BGO animal PET and human PET systems. In the first generation HYPER electronics, the integration and weight-sum circuits were implemented using analog signal. However, the same idea can be implemented in full digital mode. In the digital HYPER method, the input signal is digitized with a free run ADC, and then processed in a Field Programmable Gate Array (FPGA). Recent improvement in integrated circuit technology makes it possible to do digitization and real-time processing with clock frequency over 200MHz. The dead time is reduced because there's no dead-time for discharging the integration value. The analog delay line used to balance the trigger delay is removed, which will reduce the signal distortion, and in turn increase the measurement resolution. The processing in the FPGA includes digital integration, weight-sum, and dynamic pile-up correction. Simulation shows a possible working frequency of 320MHz with a low-cost FPGA, the Altera CY2C35F484C6. Energy spectrum of LSO with count rate up to 20MCPS has been studied. The energy resolution of 1, 2, 4, 8, 12, 16 and 20MCPS is 10.6%, 11.1%, 12.4%, 14.1%, 16.2%, 18.4% and 23.0%, respectively.
KW - HYPER
KW - PET
KW - Pileup
UR - http://www.scopus.com/inward/record.url?scp=48149099925&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=48149099925&partnerID=8YFLogxK
U2 - 10.1109/NSSMIC.2007.4437051
DO - 10.1109/NSSMIC.2007.4437051
M3 - Conference contribution
AN - SCOPUS:48149099925
SN - 1424409233
SN - 9781424409235
T3 - IEEE Nuclear Science Symposium Conference Record
SP - 4230
EP - 4232
BT - 2007 IEEE Nuclear Science Symposium and Medical Imaging Conference, NSS-MIC
T2 - 2007 IEEE Nuclear Science Symposium and Medical Imaging Conference, NSS-MIC
Y2 - 27 October 2007 through 3 November 2007
ER -